2024年3月13日发(作者：)

26 S3 = ADD (A[3], B[3], S2[1]),

27 S = {S3[0], S2[0], S1[0], S0[0]},

28 COUT = S3[1];

29 endmodule

View Code

1 Filename: task_1.v

2 // Verilog tasks

3 // tasks_1.v

4 //

5 module tasks_1 (A, B, CIN, S, COUT);

6 input [3:0] A, B;

7 input CIN;

8 output [3:0] S;

9 output COUT;

10 reg [3:0] S;

11 reg COUT;

12 reg [1:0] S0, S1, S2, S3;

13

14 task ADD;

15 input A, B, CIN;

16 output [1:0] C;

17 reg [1:0] C;

18 reg S, COUT;

19 begin

20 S = A ^ B ^ CIN;

21 COUT = (A&B) | (A&CIN) | (B&CIN);

22 C = {COUT, S};

23 end

24 endtask

25

26 always @(A or B or CIN)

27 begin

28 ADD (A[0], B[0], CIN, S0);

29 ADD (A[1], B[1], S0[1], S1);

30 ADD (A[2], B[2], S1[1], S2);

31 ADD (A[3], B[3], S2[1], S3);

32 S = {S3[0], S2[0], S1[0], S0[0]};

33 COUT = S3[1];

34 end

35

36 endmodule

View Code

1 Filename: asym_ram_tdp_read_first.v

2 // Asymetric RAM - TDP

3 // READ_FIRST MODE.

4 // asym_ram_tdp_read_first.v

5

6 module asym_ram_tdp_read_first

7 (clkA, clkB, enaA, weA, enaB, weB, addrA, addrB, diA, doA, diB, doB);

8

9 parameter WIDTHB = 4;

10 parameter SIZEB = 1024;

11 parameter ADDRWIDTHB = 10;

12 parameter WIDTHA = 16;

13 parameter SIZEA = 256;

14 parameter ADDRWIDTHA = 8;

15

16 input clkA;

17 input clkB;

18 input weA, weB;

19 input enaA, enaB;

20 input [ADDRWIDTHA-1:0] addrA;

21 input [ADDRWIDTHB-1:0] addrB;

22 input [WIDTHA-1:0] diA;

23 input [WIDTHB-1:0] diB;

24 output [WIDTHA-1:0] doA;

25 output [WIDTHB-1:0] doB;

26

27 `define max(a,b) {(a) > (b) ? (a) : (b)}

28 `define min(a,b) {(a) < (b) ? (a) : (b)}

29

30 function integer log2;

disable

Verilog Design Hierarchies

module definition

macromodule definition

hierarchical names

defparam

array of instances

Verilog Compiler Directives

`celldefine `endcelldefine

`default_nettype

`define

`ifdef `else `endif

`undef, `ifndef, `elsif

`include

`resetall

`timescale

`unconnected_drive

`nounconnected_drive

`uselib

`file, `line

Supported except in For

and Repeat

Loop statements

Supported

Unsupported

Supported

Supported

Supported

Ignored

Supported

Supported

Supported

Supported

Supported

Ignored

Ignored

Ignored

Unsupported

Supported