2024年4月6日发(作者:)
SH1106
132 X 64 Dot Matrix OLED/PLED
Segment/Common Driver with Controller
Features
n Support maximum 132 X 64 dot matrix panel
n Embedded 132 X 64 bits SRAM
n Operating voltage:
- Logic voltage supply: V
DD1
= 1.65V - 3.5V
- DC-DC voltage supply: V
DD2
= 3.0V - 4.2V
- OLED Operating voltage supply:
External V
PP
supply = 6.4V - 14.0V
Internal V
PP
generator = 6.4V - 9.0V
n Maximum segment output current: 200mA
n Maximum common sink current: 27mA
n 8-bit 6800-series parallel interface, 8-bit 8080-series
parallel interface, 3-wire & 4-wire serial peripheral
2
interface, 400KHz fast IC bus interface
n Row re-mapping and column re-mapping (ADC)
n Vertical scrolling
n On-chip oscillator
n Programmable Internal charge pump circuit output
n 256-step contrast control on monochrome passive OLED
panel
n Low power consumption
-
-
-
Sleep mode: <5mA
VDD1=0V,VDD2=3.0V – 4.2V: <5mA
VDD1,2=0V,VPP=6.4V –14.0V: <5mA
n Wide range of operating temperatures: -40 to +85°C
n Available in COG form, thickness: 300mm
n Programmable frame frequency and multiplexing ratio
General Description
SH1106 is a single-chip CMOS OLED/PLED driver with controller for organic/polymer light emitting diode dot-matrix graphic
display system. SH1106 consists of 132 segments, 64 commons that can support a maximum display resolution of 132 X 64. It
is designed for Common Cathode type OLED panel.
SH1106 embeds with contrast control, display RAM oscillator and efficient DC-DC converter, which reduces the number of
external components and power consumption. SH1106 is suitable for a wide range of compact portable applications, such as
sub-display of mobile phone, calculator and MP3 player, etc.
1 V2.3
SH1106
Block Diagram
SEG0SEG131COM0COM63
V
DD1
V
DD2
V
SS
V
COMH
V
CL
V
SL
Power supply
Segment driverCommon driver
circuit
I
REF
Shift register
V
PP
C1N
C1P
C2N
Charge Pump
Display data latch
C2P
r
e
r
t
V
e
s
BREF
t
i
d
g
i
u
o
e
c
c
r
r
r
e
e
t
e
Output status
c
i
dn
132 X 64-dots
n
i
r
s
u
selector circuit
e
s
o
l
f
e
c
y
f
u
Display Data RAM
r
a
l
b
d
e
p
d
n
s
O
i
a
L
i
/
d
I
e
l
n
a
i
l
i
t
i
n
I
Column address decoder
Page Address
Register
8-bit column address counter
Display Timing
Generator Circuit
8-bit column address counter
Bus HolderCommand DecoderBus HolderOscillator
Microprocessor InterfaceI/O Buffer
CSA0RDWRRES
IM0IM1IM2
D7D6D5D4D3D2D1D0
(SA0)(E)(R/W)
(SI/SDA)(SCL)
2
CL
CLS


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