2024年3月23日发(作者：)

元器件交易网

IS34C02B

2K-bit 2-WIRE SERIAL CMOS EEPROM

with Permanent and Reversible Write-Protection

ISSI

DESCRIPTION

®

ADVANCED INFORMATION

APRIL 2006

FEATURES

•Two-Wire Serial Interface, I

2

C

TM

compatible

– Bidirectional data transfer protocol

– 400 kHz (2.5V) and 100 KHz (1.7V) compat-

ibility

•Organization:

– 256 x 8-bit

•Data Protection Features

– Write Protect Pin

– Permanent Software Protection

– Reversible Software Protection

•16-Byte Page Write Buffer

– Partial Page-writes permitted

•Low Power CMOS Technology

– Active Current less than 3 mA (3.6V)

– Standby Current less than 1 µA (1.7V)

– Standby Current less than 2 µA (3.6V)

•Low Voltage Operation

– IS34C02B-2: Vcc = 1.7V to 3.6V

•Random or Sequential Read Modes

•Filtered Inputs for Noise Suppression

•Self timed Write cycle (5ms max.)

•High Reliability

– Endurance: 1,000,000 Cycles

– Data Retention: 40 Years

•Industrial temperature range

•8-pin TSSOP and DFN (leadless array)

•Lead-free available

The IS34C02B is an electrically erasable PROM device

that uses the industry-standard I

2

C communication

protocol. The IS34C02B contains a non-volatile memory

array of 2,048-bits (256K x 8 bytes), and is further

subdivided into 16 pages of 16 bytes each for Page-

write mode. The device operates over the voltage range

of 1.7V to 3.6V to satisfy the voltage requirements of

DDR2, DDR1, and many other specifications. In normal

Read or Write operations, a master device communi-

cates with the EEPROM via the two wires Serial Clock

and Serial Data. During application system boot-up, it

may be necessary to read out the contents of the

IS34C02B that pertain to the configuration of a DRAM

module. If the module manufacturer wishes to safe-

guard this memory content, the first half of the array can

be write-protected with either a permanent or reversible

software command, or the entire array can be write-

protected with the WP input pin. The IS34C02B has

three address pins, allowing up to eight devices (or

memory modules) to be uniquely accessible in a sys-

tem. To minimize board real-estate, IS34C02B is

available in two space-saving packages: TSSOP(8), and

DFN(8). All these features make the device ideal for

use as a Serial Presence Detect (SPD) EEPROM in

various types of memory modules.

Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published

information and before placing orders for products.

Integrated Silicon Solution, Inc. — —

1-800-379-4774

ADVANCED INFORMATIONRev. 00D

03/21/06

1

元器件交易网

IS34C02B

ISSI

®

FUNCTIONAL BLOCK DIAGRAM

Vcc

HIGH VOLTAGE

GENERATOR,

TIMING & CONTROL

SDA

WP

SLAVE ADDRESS

REGISTER &

COMPARATOR

A0

A1

A2

WORD ADDRESS

COUNTER

X

D

E

C

O

D

E

R

SCL

CONTROL

LOGIC

00H-7FH

ARRAY

80H-FFH

Y

DECODER

GND

nMOS

ACKClock

DI/O

>

DATA

REGISTER

2

Integrated Silicon Solution, Inc. — —

1-800-379-4774

ADVANCED INFORMATIONRev.00D

03/21/06