2024年4月27日发(作者：)

display_

文件名必须为display_, 必须把文件display_放TF的根目录，配制时

只能修改＝和；之间的内容，内容必须是数字，否则系统会不正常。

screen0_output_type=2;

screen0_output_mode=5;

lcd_x=1366;

lcd_y=768;

lcd_dclk_freq=80;

lcd_hbp=90;

lcd_ht=1640;

lcd_vbp=16;

lcd_vt=1620;

lcd_lvds_ch=0;

lcd_lvds_mode=0;

lcd_lvds_bitwidth=0;

lcd_lvds_io_cross=0;

配制不同的显示设备类型（LVDS, VGA, YPBPR, HDMI, CVBS）

CVBS:

screen0_output_type=2;

screen0_output_mode=11;

;screen0_output_type (1:LVDS; 2:CVBS/YPBPR; 3:HDMI; 4:VGA)

;screen0_output_mode (userd for CVBS output, 11:pal 14:ntsc)

YPBPR:

screen0_output_type=2;

screen0_output_mode=0;

;screen0_output_type (1:LVDS; 2:CVBS/YPBPR; 3:HDMI; 4:VGA)

;screen0_output_mode (userd for YPBPR output, 0:480i 1:576i 2:480p 3:576p 4:720p50 5:720p60

9:1080p50 10:1080p60)

HDMI:

screen0_output_type=3;

screen0_output_mode=0;

;screen0_output_type (1:LVDS; 2:CVBS/YPBPR; 3:HDMI; 4:VGA)

;screen0_output_mode (userd for HDMI output, 0:480i 1:576i 2:480p 3:576p 4:720p50 5:720p60

6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60)

VGA:

screen0_output_type=4;

screen0_output_mode=0;

;screen0_output_type (1:LVDS; 2:CVBS/YPBPR; 3:HDMI; 4:VGA)

;screen0_output_mode (userd for VGA output, 0:1680*1050 1:1440*900 2:1360*768

3:1280*1024 4:1024*768 5:800*600 6:640*480 10:1920*1080 11:1280*720)

LVDS:

screen0_output_type=1;

;screen0_output_type (1:LVDS; 2:CVBS/YPBPR; 3:HDMI; 4:VGA)

分辨率为1366x768

lcd_x=1366;

lcd_y=768;

lcd_dclk_freq=80;

lcd_hbp=90;

lcd_ht=1640;

lcd_vbp=16;

lcd_vt=1620;

lcd_lvds_ch=0;

lcd_lvds_mode=0;

lcd_lvds_bitwidth=0;

lcd_lvds_io_cross=0;

分辨率为1440x900

lcd_x=1440;

lcd_y=900;

lcd_dclk_freq=80;

lcd_hbp=90;

lcd_ht=2100;

lcd_vbp=16;

lcd_vt=2260;

lcd_lvds_ch=1;

lcd_lvds_mode=0;

lcd_lvds_bitwidth=0;

lcd_lvds_io_cross=0;

分辨率为1680x1050

lcd_x=1680;

lcd_y=1050;

lcd_dclk_freq=80;

lcd_hbp=90;

lcd_ht=2100;

lcd_vbp=16;

lcd_vt=2260;

lcd_lvds_ch=1;

lcd_lvds_mode=0;

lcd_lvds_bitwidth=0;

lcd_lvds_io_cross=0;

分辨率为1920x1080

lcd_x=1920;

lcd_y=1080;

lcd_dclk_freq=80;

lcd_hbp=90;

lcd_ht=2100;

lcd_vbp=16;

lcd_vt=2260;

lcd_lvds_ch=1;

lcd_lvds_mode=0;

lcd_lvds_bitwidth=0;

lcd_lvds_io_cross=0;

注意：LVDS重点修改项为：

lcd_x=1920;

lcd_y=1080;

lcd_dclk_freq=80;

lcd_lvds_ch=1;

;lcd_dclk_freq: in MHZ unit （LVDS时钟最大值为108）

;lcd_hbp: hsync back porch

;lcd_ht: hsync total cycle

;lcd_vbp: vsync back porch

;lcd_vt: vysnc total cycle *2

;lcd_lvds_ch: 0:single channel; 1:dual channel

;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode

;lcd_lvds_bitwidth: 0:24bit; 1:18bit

;lcd_lvds_io_cross: 0:normal; 1:pn cross