2024年5月2日发(作者:)

DRV8833

016B–JANUARY2011–REVISEDAUGUST2011

双通道H桥电机驱动器

查询样品:DRV8833

特性

•双通道H桥电流控制电机驱动器

–能够驱动两个直流(DC)电机或一个步进电机

–低MOSFET导通电阻

HS+LS360mΩ

每个H桥的输出电流为1.5-ARMS、2APP(在

V

M

=5V和25℃条件下)

产品可以为3-ARMS,

4-A平行峰顶

宽电源电压范围:

2.7V至10.8V

PWM绕组电流调节/限制

耐热性能增强型表面贴装式封装

应用

电池供电式玩具

POS打印机

视频安保摄像机

办公自动化设备

游戏机

机器人

说明

DRV8833为玩具、打印机及其他机电一体化应用提供了一款双通道桥式电机驱动器解决方案。

该器件具有两个H桥驱动器,并能够驱动两个直流(DC)电刷电机、一个双极性步进电机、螺线管或其他电感性负

载。

每个H桥的输出驱动器模块由N沟道功率MOSFET组成,这些MOSFET被配置成一个H桥,以驱动电机绕组。

每个H桥都包括用于调节或限制绕组电流的电路。

借助正确的PCB设计,DRV8833的每个H桥能够连续提供高达1.5-ARMS(或DC)的驱动电流(在25℃和采

用一个5VVM电源时)。每个H桥可支持高达2A的峰值电流。在较低的VM电压条件下,电流供应能力略有下

降。

该器件提供了利用一个故障输出引脚实现的内部关断功能,用于:过流保护、短路保护、欠压闭锁和过热。另外,

还提供了一种低功耗睡眠模式。

DRV8833内置于16引脚HTSSOP封装或采用PowerPAD™的QFN封装(绿色环保:RoHS和无Sb/Br)。

订购信息

(1)

封装

(2)

PowerPAD™(HTSSOP)-PWP

PowerPAD™(QFN)-RTY

(1)

(2)

2000卷带式包装

Tubeof90

3000卷带

卷盘(250片)

可订购部件

DRV8833PWPR

DRV8833PWP

DRV8833RTYR

DRV8833RTYT

正面

标记

DRV8833

DRV8833

如需了解最新的封装及订购信息,敬请查看本文档末的“封装选项附录”,或查看TI网站。

封装图样、散热数据和符号可登录/packaging获取。

Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas

Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.

PowerPADisatrademarkofTexasInstruments.

Copyright©2011,TexasInstrumentsIncorporated

PRODUCTIONDATAinformationiscurrentasofpublicationdate.

ProductsconformtospecificationsperthetermsoftheTexas

tionprocessingdoesnot

necessarilyincludetestingofallparameters.

EnglishDataSheet:SLVSAR1

DRV8833

ZHCS016B–JANUARY2011–

DEVICEINFORMATION

FunctionalBlockDiagram

VINT

Internal

Ref&

Regs

2.2uF

VM

VM

10uF

Charge

Pump

VM

VM

VCP

0.01uF

Drives2x DC motor

or1x Stepper

AOUT1

AIN1

AIN2

Gate

Drive

&

OCP

VM

DCM

Step

Motor

BIN1

BIN2

AOUT2

AISEN

ISEN

Logic

nSLEEP

BOUT1

nFAULT

Gate

Drive

&

OCP

Over-

Temp

VM

VM

DCM

BOUT2

ISEN

BISEN

GND

2

Copyright©2011,TexasInstrumentsIncorporated

DRV8833

016B–JANUARY2011–REVISEDAUGUST2011

ALFUNCTIONS

NAME

PIN

(PWP)

PIN

(RTY)

I/O

(1)

DESCRIPTION

EXTERNALCOMPONENTS

ORCONNECTIONS

BoththeGNDpinanddevice

PowerPADmustbeconnectedto

ground

Connecttomotorsupply.A10-µF

(minimum)ceramicbypasscapacitorto

GNDisrecommended.

BypasstoGNDwith2.2-μF,6.3-V

capacitor

Connecta0.01-μF,16-V(minimum)

X7RceramiccapacitortoVM

LogicinputcontrolsstateofAOUT1.

Internalpulldown.

LogicinputcontrolsstateofAOUT2.

Internalpulldown.

LogicinputcontrolsstateofBOUT1.

Internalpulldown.

LogicinputcontrolsstateofBOUT2.

Internalpulldown.

Logichightoenabledevice,logiclowto

enterlow-powersleepmodeandreset

alpulldown.

Logiclowwheninfaultcondition

(overtemp,overcurrent)

Connecttocurrentsenseresistorfor

bridgeA,orGNDifcurrentcontrolnot

needed

Connecttocurrentsenseresistorfor

bridgeB,orGNDifcurrentcontrolnot

needed

ConnecttomotorwindingA

ConnecttomotorwindingB

POWERANDGROUND

GND

13

PPAD

12

14

11

11

PPAD

10

12

9

-Deviceground

VM

VINT

VCP

CONTROL

AIN1

AIN2

BIN1

BIN2

nSLEEP

STATUS

nFAULT

OUTPUT

AISEN

-

-

IO

Devicepowersupply

Internalsupplybypass

High-sidegatedrivevoltage

16

15

9

10

1

14

13

7

8

15

I

I

I

I

I

BridgeAinput1

BridgeAinput2

BridgeBinput1

BridgeBinput2

Sleepmodeinput

86ODFaultoutput

31IOBridgeAground/Isense

BISEN

AOUT1

AOUT2

BOUT1

BOUT2

(1)

6

2

4

7

5

4

16

2

5

3

IO

O

O

O

O

BridgeBground/Isense

BridgeAoutput1

BridgeAoutput2

BridgeBoutput1

BridgeBoutput2

Directions:I=input,O=output,OZ=tri-stateoutput,OD=open-drainoutput,IO=input/output

Copyright©2011,TexasInstrumentsIncorporated

3

DRV8833

ZHCS016B–JANUARY2011–

PWP PACKAGE

(TOPVIEW)

nSLEEP

AOUT1

AISEN

AOUT2

BOUT2

BISEN

BOUT1

nFAULT

1

2

3

4

5

6

7

8

GND

(PPAD)

16

15

14

13

12

11

10

9

AIN1

AIN2

VINT

GND

VM

VCP

BIN2

BIN1

RTY PACKAGE

(TOPVIEW)

A

O

U

T

1

n

S

L

E

E

P

A

I

N

1

A

I

N

2

1

6

1

5

1

4

AISEN

AOUT2

BOUT2

BISEN

1

3

12

1

2

3

4

GND

(PPAD)

11

10

9

VINT

GND

VM

VCP

56

4

B

O

U

T

1

n

F

A

U

L

T

B

I

N

1

B

I

N

2

7

8

Copyright©2011,TexasInstrumentsIncorporated

DRV8833

016B–JANUARY2011–REVISEDAUGUST2011

ABSOLUTEMAXIMUMRATINGS

(1)(2)

VALUE

VMPowersupplyvoltagerange

Digitalinputpinvoltagerange

xISENpinvoltage

Peakmotordriveoutputcurrent

T

J

T

stg

(1)

(2)

Operatingjunctiontemperaturerange

Storagetemperaturerange

–0.3to11.8

–0.5to7

–0.3to0.5

Internallylimited

–40to150

–60to150

UNIT

V

V

V

A

°C

°C

Stressesbeyondthoselistrestressratings

only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating

retoabsolute–maximum–ratedconditionsforextendedperiodsmayaffectdevicereliability.

Allvoltagevaluesarewithrespecttonetworkgroundterminal.

THERMALINFORMATION

THERMALMETRIC

θ

JA

θ

JCtop

θ

JB

ψ

JT

ψ

JB

θ

JCbot

(1)

(2)

(3)

(4)

(5)

(6)

Junction-to-ambientthermalresistance

(1)

Junction-to-case(top)thermalresistance

(2)

Junction-to-boardthermalresistance

(3)

Junction-to-topcharacterizationparameter

(4)

Junction-to-boardcharacterizationparameter

(5)

Junction-to-case(bottom)thermalresistance

(6)

PWP

16PINS

40.5

32.9

28.8

0.6

11.5

4.8

RTY

16PINS

37.2

34.3

15.3

0.3

15.4

3.5

°C/W

UNITS

Thejunction-to-ambientthermalresistanceundernaturalconvectionisobtainedinasimulationonaJEDEC-standard,high-Kboard,as

specifiedinJESD51-7,inanenvironmentdescribedinJESD51-2a.

Thejunction-to-case(top)thermific

JEDEC-standardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.

Thejunction-to-boardthermalresistanceisobtainedbysimulatinginanenvironmentwitharingcoldplatefixturetocontrolthePCB

temperature,asdescribedinJESD51-8.

Thejunction-to-topcharacterizationparameter,ψ

JT

,estimatesthejunctiontemperatureofadeviceinarealsystemandisextracted

fromthesimulationdataforobtainingθ

JA

,usingaproceduredescribedinJESD51-2a(sections6and7).

Thejunction-to-boardcharacterizationparameter,ψ

JB

,estimatesthejunctiontemperatureofadeviceinarealsystemandisextracted

fromthesimulationdataforobtainingθ

JA

,usingaproceduredescribedinJESD51-2a(sections6and7).

Thejunction-to-case(bottom)thermalresistanceisobtainedbysimulatingacoldplatetestontheexposed(power)ific

JEDECstandardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.

RECOMMENDEDOPERATINGCONDITIONS

T

A

=25°C(unlessotherwisenoted)

MIN

V

M

V

DIGIN

I

OUT

(1)

(2)

Motorpowersupplyvoltagerange

(1)

Digitalinputpinvoltagerange

ContinuousRMSorDCoutputcurrentperbridge

(2)

NotethatR

DS(ON)

increasesandmaximumoutputcurrentisreducedatVMsupplyvoltagesbelow5V.

V

M

=5V,powerdissipationandthermallimitsmustbeobserved.

2.7

-0.3

NOMMAX

10.8

5.75

1.5

UNIT

V

V

A

Copyright©2011,TexasInstrumentsIncorporated

5

DRV8833

ZHCS016B–JANUARY2011–

ELECTRICALCHARACTERISTICS

T

A

=25°C(unlessotherwisenoted)

PARAMETER

POWERSUPPLY

I

VM

I

VMQ

V

UVLO

V

HYS

VMoperatingsupplycurrent

VMsleepmodesupplycurrent

VMundervoltagelockoutvoltage

VMundervoltagelockout

hysteresis

nSLEEP

Allotherpins

nSLEEP

Allotherpins

nSLEEP

AllexceptnSLEEP

VIN=0

VIN=3.3V,nSLEEP

VIN=3.3V,allexceptnSLEEP

6.6

16.5

450

I

O

=5mA

V

O

=3.3V

V

M

=5V,I

O

=500mA,T

J

=25°C

HSFETonresistance

R

DS(ON)

LSFETonresistance

V

M

=5V,I

O

=500mA,T

J

=85°C

V

M

=2.7V,I

O

=500mA,T

J

=25°C

V

M

=2.7V,I

O

=500mA,T

J

=85°C

V

M

=5V,I

O

=500mA,T

J

=25°C

V

M

=5V,I

O

=500mA,T

J

=85°C

V

M

=2.7V,I

O

=500mA,T

J

=25°C

V

M

=2.7V,I

O

=500mA,T

J

=85°C

I

OFF

f

PWM

t

R

t

F

t

PROP

t

DEAD

I

OCP

t

DEG

t

OCP

t

TSD

(1)

Off-stateleakagecurrent

CurrentcontrolPWMfrequency

Risetime

Falltime

PropagationdelayINxtoOUTx

Deadtime

(1)

TESTCONDITIONS

V

M

=5V,xIN1=0V,xIN2=0V

V

M

=5V

V

M

falling

MINTYP

1.7

1.6

MAX

3

2.5

2.6

UNIT

mA

μA

V

mV90

LOGIC-LEVELINPUTS

V

IL

V

IH

V

HYS

R

PD

I

IL

I

IH

t

DEG

V

OL

I

OH

Inputlowvoltage

Inputhighvoltage

Inputhysteresis

Inputpull-downresistance

Inputlowcurrent

Inputhighcurrent

Inputdeglitchtime

Outputlowvoltage

Outputhighleakagecurrent

0.5

0.7

2.5

2

0.4

500

150

1

13

33

V

V

V

μA

μA

ns

0.5

1

200

325

250

350

160

275

200

300

–1

50

180

160

1.1

450

23.3

2.25

1.35

Dietemperature150160180

1μA

kHz

ns

ns

µs

ns

A

µs

ms

°C

mΩ

V

μA

nFAULTOUTPUT(OPEN-DRAINOUTPUT)

H-BRIDGEFETS

V

M

=5V,T

J

=25°C,V

OUT

=0V

InternalPWMfrequency

V

M

=5V,16ΩtoGND,10%to90%V

M

V

M

=5V,16ΩtoGND,10%to90%V

M

V

M

=5V

V

M

=5V

MOTORDRIVER

PROTECTIONCIRCUITS

Overcurrentprotectiontriplevel

OCPDeglitchtime

Overcurrentprotectionperiod

Thermalshutdowntemperature

alimplementationisnotnecessary.

6

Copyright©2011,TexasInstrumentsIncorporated

DRV8833

016B–JANUARY2011–REVISEDAUGUST2011

ELECTRICALCHARACTERISTICS(continued)

T

A

=25°C(unlessotherwisenoted)

PARAMETER

CURRENTCONTROL

V

TRIP

t

BLANK

t

WAKE

xISENtripvoltage

Currentsenseblankingtime

StartuptimenSLEEPinactivehightoH-bridgeon

160200

3.75

1

240mV

µs

ms

TESTCONDITIONSMINTYPMAXUNIT

SLEEPMODE

Copyright©2011,TexasInstrumentsIncorporated

7

DRV8833

ZHCS016B–JANUARY2011–

FUNCTIONALDESCRIPTION

PWMMotorDrivers

DRV8833containsdiagramofthe

circuitryisshownbelow:

OCP

VCP,VINT

VM

VM

xOUT1

xIN1

Pre-

drive

xOUT2

xIN2

PWM

OCP

DCM

-

+

xISEN

Optional

REF(200mV)

ontrolCircuitry

BridgeControlandDecayModes

TheAIN1andAIN2inputpinscontrolthestateoftheAOUT1andAOUT2outputs;similarly,theBIN1andBIN2

2showsthelogic.

Table2.H-BridgeLogic

xIN1

0

0

1

1

xIN2

0

1

0

1

xOUT1

Z

L

H

L

xOUT2

Z

H

L

L

FUNCTION

Coast/fast

decay

Reverse

Forward

Brake/slow

decay

ntrollingawindingwithPWM,when

thedrivecurrentisinterrupted,theinductivenatureofthemotorrequiresthatthecurrentmustcontinuetoflow.

lethisrecirculationcurrent,theH-bridgecanoperateintwodifferent

states,decaymode,theH-bridgeisdisabledandrecirculationcurrentflows

throughthebodydiodes;inslowdecay,themotorwindingisshorted.

ToPWMusingfastdecay,thePWMsignalisappliedtoonexINpinwhiletheotherisheldlow;touseslow

decay,onexINpinisheldhigh.

trolofMotorSpeed

xIN1

PWM

1

0

PWM

xIN2

0

PWM

PWM

1

FUNCTION

ForwardPWM,fastdecay

ForwardPWM,slowdecay

ReversePWM,fastdecay

ReversePWM,slowdecay

8

Copyright©2011,TexasInstrumentsIncorporated

DRV8833

016B–JANUARY2011–REVISEDAUGUST2011

Figure2showsthecurrentpathsindifferentdriveanddecaymodes.

VMVM

1

Forward drive

1

xOUT1

2

xOUT2

2

Fast decay

3

Slow decay

xOUT1

2

1

xOUT2

1

Reverse drive

2

Fast decay

3

Slow decay

3

3

FORWARD

odes

REVERSE

CurrentControl

Thecurrentthroughthemotorwindingsmaybelimited,orcontrolled,byafixed-frequencyPWMcurrent

regulation,otors,currentcontrolisusedtolimitthestart-upandstallcurrentofthe

ppermotors,currentcontrolisoftenusedatalltimes.

WhenanH-bridgeisenabled,currentrisesthroughthewindingataratedependentontheDCvoltageand

urrentreachesthecurrentchoppingthreshold,thebridgedisablesthecurrent

atimmediatelyafterthecurrentisenabled,thevoltageonthe

xISENpinisignankingtimeis

fixedat3.75μankingtimealsosetstheminimumontimeofthePWMwhenoperatingincurrent

choppingmode.

ThePWMchoppingcurrentissetbyacomparatorwhichcomparesthevoltageacrossacurrentsenseresistor

erencevoltageisfixedat200mV.

ThechoppingcurrentiscalculatedinEquation1.

mV

¾

I

CHOP

=

200

R

ISENSE

Example:

Ifa1-Ωsenseresistorisused,thechoppingcurrentwillbe200mV/1Ω=200mA.

(1)

Oncethechoppingcurrentthresholdisreached,gcurrentis

ateishelduntilthebeginningofthenext

fixed-frequencyPWMcycle.

Notethatifcurrentcontrolisnotneeded,thexISENpinsshouldbeconnecteddirectlytoground.

Copyright©2011,TexasInstrumentsIncorporated

9

DRV8833

ZHCS016B–JANUARY2011–

nSLEEPOperation

state,theH-bridgesaredisabled,the

gatedrivechargepumpisstopped,allinternallogicisreset,utsare

turningfromsleepmode,sometime(upto1ms)needsto

theboarddesignsimple,thenSLEEPcanbe

pulleduptothesupply(VM).sistorlimitsthe

ally,thenSLEEPpinhasa500-kΩ

tsgreaterthan250µAcan

herecommendedpullupresistorwouldbebetween20kΩand

75kΩ.

ProtectionCircuits

TheDRV8833isfullyprotectedagainstundervoltage,overcurrentandovertemperatureevents.

OvercurrentProtection(OCP)

Ananalogcurrentlimitcirc

analogcurrentlimitpersistsforlongerthantheOCPdeglitchtime,allFETsintheH-bridgewillbedisabledand

verwillbere-enabledaftertheOCPretryperiod(t

OCP

)haspassed.

aultconditionisstillpresent,aultisno

longerpresent,notethatonlytheH-bridge

inwhichtheOCPisdetectedwillbedisabledwhiletheotherbridgewillfunctionnormally.

Overcurre,ashorttoground,

supply,atovercurrentprotection

doesnotusethecurrentsensecircuitryusedforPWMcurrentcontrol,sofunctionsevenwithoutpresenceofthe

xISENresistors.

ThermalShutdown(TSD)

Ifthedietemperatureexceedssafelimits,allFETsintheH-bridgewillbedisabledandthenFAULTpinwillbe

edietemperaturehasfallentoasafeleveloperationwillautomaticallyresume.

UndervoltageLockout(UVLO)

IfatanytimethevoltageontheVMpinfallsbelowtheundervoltagelockoutthresholdvoltage,allcircuitryinthe

devicewillbedisabled,ionwillresumewhenVMrisesabovetheUVLO

isdrivenlowintheeventofanundervoltagecondition.

10

Copyright©2011,TexasInstrumentsIncorporated

DRV8833

016B–JANUARY2011–REVISEDAUGUST2011

APPLICATIONSINFORMATION

ParallelMode

ThetwoH-bridgesintheDRV8

internaldeadtimeintheDRV8833preventsanyriskofcross-conduction(shoot-through)betweenthetwo

wingbelowshowstheconnections.

elMode

Copyright©2011,TexasInstrumentsIncorporated

11

DRV8833

ZHCS016B–JANUARY2011–

THERMALINFORMATION

MaximumOutputCurrent

Inactualoperation,themaximumoutputcurrentachievablewithamotordriverisafunctionofdietemperature.

lly,themaximummotorcurrent

willbetheamountofcurrentthatresultsinapowerdissipationlevelthat,alongwiththethermalresistanceofthe

packageandPCB,keepsthedieatalowenoughtemperaturetostayoutofthermalshutdown.

Thedissipationratingsgiveninthedatasheetcanbeusedasaguidetocalculatetheapproximatemaximum

powerdissipationthatcanbeexpectedtobepossiblewithoutenteringthermalshutdownforseveraldifferent

r,foraccuratedata,theactualPCBdesignmustbeanalyzedviameasurementor

thermalsimulation.

ThermalProtection

TheDRV8833hasthermalshutdown(TSD)ietemperatureexceedsapproximately

150°C,thedevicewillbedisableduntilthetemperaturedropsby45°C.

AnytendencyofthedevicetoenterTSDisanindicationofeitherexcessivepowerdissipation,insufficient

heatsinking,ortoohighanambienttemperature.

PowerDissipation

PowerdissipationintheDRV8833isdominatedbytheDCpowerdissipatedintheoutputFETresistance,or

RDS(ON).ThereisadditionalpowerdissipatedduetoPWMswitchinglosses,whicharedependentonPWM

frequency,riseandfalltimes,witchinglossesaretypicallyontheorderof10%

to30%oftheDCpowerdissipation.

TheDCpowerdissipationofoneH-bridgecanberoughlyestimatedbyEquation2.

P

TOT

=(HS - R

DS(ON)

·

I

OUT(RMS)

) + (LS - R

DS(ON)

·

I

OUT(RMS)

)

22

(2)

whereP

TOT

isthetotalpowerdissipation,HS-R

DS(ON)

istheresistanceofthehighsideFET,LS-R

DS(ON)

isthe

resistanceofthelowsideFET,andI

OUT(RMS)

istheRMSoutputcurrentbeingappliedtothemotor.

NotethatR

DS(ON)

increaseswithtemperature,soasthedeviceheats,st

betakenintoconsiderationwhensizingtheheatsink.

Heatsinking

ThePowerPAD™peroperation,thispad

ti-layerPCBwithagroundplane,

thiscanbeaccompli

withoutinternalplanes,opperarea

isontheoppositesideofthePCBfromthedevice,thermalviasareusedtotransfertheheatbetweentopand

bottomlayers.

FordetailsabouthowtodesignthePCB,refertoTIapplicationreportSLMA002,"PowerPAD™Thermally

EnhancedPackage"andTIapplicationbriefSLMA004,"PowerPAD™MadeEasy",.

Ingeneral,themorecopperareathatcanbeprovided,themorepowercanbedissipated.

12

Copyright©2011,TexasInstrumentsIncorporated

PACKAGE OPTION ADDENDUM

11-Apr-2013

PACKAGING INFORMATION

Orderable Device

DRV8833PW

DRV8833PWP

DRV8833PWPR

DRV8833PWR

DRV8833RTYR

DRV8833RTYT

(1)

Status

(1)

Package TypePackagePinsPackage

DrawingQty

TSSOP

HTSSOP

HTSSOP

TSSOP

QFN

QFN

PW

PWP

PWP

PW

RTY

RTY

16

16

16

16

16

16

90

90

2000

2000

3000

250

Eco Plan

(2)

Lead/Ball Finish

CU NIPDAU

CU NIPDAU

CU NIPDAU

CU NIPDAU

CU NIPDAU

CU NIPDAU

MSL Peak Temp

(3)

Op Temp (°C)

-40 to 85

-40 to 85

-40 to 85

-40 to 85

-40 to 85

-40 to 85

Top-Side Markings

(4)

Samples

ACTIVE

ACTIVE

ACTIVE

ACTIVE

ACTIVE

ACTIVE

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Level-3-260C-168 HR

Level-3-260C-168 HR

Level-3-260C-168 HR

Level-3-260C-168 HR

Level-3-260C-168 HR

Level-3-260C-168 HR

8833PW

DRV8833

DRV8833

8833PW

DRV8833

DRV8833

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a

continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

11-Apr-2013

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGEMATERIALSINFORMATION

4-Mar-2013

TAPEANDREELINFORMATION

*Alldimensionsarenominal

DevicePackagePackagePins

TypeDrawing

HTSSOP

TSSOP

QFN

QFN

PWP

PW

RTY

RTY

16

16

16

16

SPQReelReelA0

DiameterWidth(mm)

(mm)W1(mm)

330.0

330.0

330.0

180.0

12.4

12.4

12.4

12.4

6.9

6.9

4.25

4.25

B0

(mm)

5.6

5.6

4.25

4.25

K0

(mm)

1.6

1.6

1.15

1.15

P1

(mm)

8.0

8.0

8.0

8.0

WPin1

(mm)Quadrant

12.0

12.0

12.0

12.0

Q1

Q1

Q2

Q2

DRV8833PWPR

DRV8833PWR

DRV8833RTYR

DRV8833RTYT

2000

2000

3000

250

PackMaterials-Page1

PACKAGEMATERIALSINFORMATION

4-Mar-2013

*Alldimensionsarenominal

Device

DRV8833PWPR

DRV8833PWR

DRV8833RTYR

DRV8833RTYT

PackageType

HTSSOP

TSSOP

QFN

QFN

PackageDrawing

PWP

PW

RTY

RTY

Pins

16

16

16

16

SPQ

2000

2000

3000

250

Length(mm)

367.0

367.0

367.0

210.0

Width(mm)

367.0

367.0

367.0

185.0

Height(mm)

35.0

35.0

35.0

35.0

PackMaterials-Page2

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对TI及其代理造成的任何损失。

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只有那些TI特别注明属于军用等级或“增强型塑料”的TI组件才是设计或专门用于军事/航空应用或环境的。购买者认可并同意,对并非指定面

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