2024年5月9日发(作者：)

元器件交易网

MSP430C11x1, MSP430F11x1A

MIXED SIGNAL MICROCONTROLLER

SLAS241H − SEPTEMBER 1999 − REVISED SEPTEMBER 2004

D

Low Supply Voltage Range 1.8 V to 3.6 V

D

Ultralow-Power Consumption

− Active Mode: 160 µA at 1 MHz, 2.2 V

− Standby Mode: 0.7 µA

− Off Mode (RAM Retention): 0.1 µA

Wake-Up From Standby Mode in less

than 6 µs

16-Bit RISC Architecture, 125 ns

Instruction Cycle Time

Basic Clock Module Configurations:

− Various Internal Resistors

− Single External Resistor

− 32-kHz Crystal

− High-Frequency Crystal

− Resonator

− External Clock Source

16-Bit Timer_A With Three

Capture/Compare Registers

On-Chip Comparator for Analog Signal

Compare Function or Slope A/D

Conversion

D

Serial Onboard Programming,

D

D

D

D

D

D

D

D

No External Programming Voltage Needed

Programmable Code Protection by

Security Fuse

Family Members Include:

MSP430C1101:1KB ROM, 128B RAM

MSP430C1111:2KB ROM, 128B RAM

MSP430C1121:4KB ROM, 256B RAM

MSP430F1101A: 1KB + 128B Flash Memory

128B RAM

MSP430F1111A: 2KB + 256B Flash Memory

128B RAM

MSP430F1121A: 4KB + 256B Flash Memory

256B RAM

Available in a 20-Pin Plastic Small-Outline

Wide Body (SOWB) Package, 20-Pin Plastic

Small-Outline Thin Package, 20-Pin TVSOP

(F11x1A only) and 24-Pin QFN

For Complete Module Descriptions, Refer

to the MSP430x1xx Family User’s Guide,

Literature Number SLAU049

description

The Texas Instruments MSP430 family of ultralow power microcontrollers consist of several devices featuring

different sets of peripherals targeted for various applications. The architecture, combined with five low power

modes is optimized to achieve extended battery life in portable measurement applications. The device features

a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to maximum code efficiency.

The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 6µs.

The MSP430x11x1(A) series is an ultralow-power mixed signal microcontroller with a built-in 16-bit timer,

versatile analog comparator and fourteen I/O pins.

Typical applications include sensor systems that capture analog signals, convert them to digital values, and then

process the data for display or for transmission to a host system. Stand alone RF sensor front end is another

area of application. The I/O port inputs provide single slope A/D conversion capability on resistive sensors.

AVAILABLE OPTIONS

PACKAGED DEVICES

T

A

PLASTIC

20-PIN SOWB

(DW)

MSP430C1101IDW

MSP430C1111IDW

MSP430C1121IDW

MSP430F1101AIDW

MSP430F1111AIDW

MSP430F1121AIDW

PLASTIC

20-PIN TSSOP

(PW)

MSP430C1101IPW

MSP430C1111IPW

MSP430C1121IPW

MSP430F1101AIPW

MSP430F1111AIPW

MSP430F1121AIPW

PLASTIC

20-PIN TVSOP

(DGV)

MSP430F1101AIDGV

MSP430F1111AIDGV

MSP430F1121AIDGV

PLASTIC

24-PIN QFN

(RGE)

MSP430C1101IRGE

MSP430C1111IRGE

MSP430C1121IRGE

MSP430F1101AIRGE

MSP430F1111AIRGE

MSP430F1121AIRGE

−40°C to 85°C

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright  1999 − 2004 Texas Instruments Incorporated

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

•

1

元器件交易网

MSP430C11x1, MSP430F11x1A

MIXED SIGNAL MICROCONTROLLER

DW, PW, or DGV PACKAGE

(TOP VIEW)

RGE PACKAGE

(TOP VIEW)

SLAS241H − SEPTEMBER 1999 − REVISED SEPTEMBER 2004

TEST

V

CC

P2.5/R

osc

V

SS

XOUT

XIN

RST/NMI

P2.0/ACLK

P2.1/INCLK

P2.2/CAOUT/TA0

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

P1.7/TA2/TDO/TDI

P1.6/TA1/TDI/TCLK

P1.5/TA0/TMS

P1.4/SMCLK/TCK

P1.3/TA2

P1.2/TA1

P1.1/TA0

P1.0/TACLK

P2.4/CA1/TA2

P2.3/CA0/TA1

NC

V

SS

XOUT

XIN

RST/NMI

P2.0/ACLK

1

23222120

2

3

4

5

6

891011

P

2

.

5

/

R

O

S

C

V

C

C

T

E

S

T

P

1

.

7

/

T

A

2

/

T

D

O

/

T

D

I

P

1

.

6

/

T

A

1

/

T

D

I

/

T

C

L

K

N

C

18

17

16

15

14

13

P1.5/TA0/TMS

P1.4/SMCLK/TCK

P1.3/TA2

P1.2/TA1

P1.1/TA0

P1.0/TACLK

Note: NC pins not internally connected

Power Pad connection to V

SS

recommended

functional block diagram

XINXOUT

V

CC

V

SS

RST/NMI

P1/JTAG

P2

8

R

OSC

Oscillator

System

Clock

ACLK

SMCLK

Flash/ROM

4KB

2KB

1KB

MCLK

MAB,

4 Bit

MCB

E

m

u

l

a

t

i

o

n

M

o

d

u

l

e

RAM

256B

128B

128B

POR

I/O Port 1

8 I/Os, with

Interrupt

Capability

I/O Port 2

6 I/Os, with

Interrupt

Capability

Test

JTAG

CPU

Incl. 16 Reg.

MAB, 16-Bit

MAB, 16 Bit

MDB, 16-Bit

MDB, 16 Bit

Bus

Conv

TEST

Watchdog

Timer

15/16-Bit

Timer_A3

3 CC Reg

Comparator

A

2

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

•

P

2

.

1

/

I

N

C

L

K

P

2

.

2

/

C

A

O

U

T

/

T

A

0

N

C

P

2

.

3

/

C

A

0

/

T

A

1

P

2

.

4

/

C

A

1

/

T

A

2

N

C

6

MDB, 8 Bit